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dc.contributor.authorAretxabaleta Astoreka, Iker
dc.contributor.authorMartínez de Alegría Mancisidor, Iñigo ORCID
dc.contributor.authorGárate Añibarro, José Ignacio
dc.contributor.authorUgalde Olea, Unai ORCID
dc.contributor.authorMartín González, José Luis ORCID
dc.date.accessioned2023-01-17T14:34:01Z
dc.date.available2023-01-17T14:34:01Z
dc.date.issued2022-03
dc.identifier.citationIET Power Electronics 15(4) : 317-324 (2022)es_ES
dc.identifier.issn1755-4543
dc.identifier.urihttp://hdl.handle.net/10810/59318
dc.description.abstractThe shorter switching times of silicon carbide (SiC) MOSFETs enable power converters to operate at higher frequencies than with silicon IGBTs. However, because SiC MOSFET die sizes are still relatively small, several devices have to be connected in parallel to cope with the high current ratings demanded. For the total current to be evenly distributed among all the MOSFETs, the gate circuit and power layout must meet stringent symmetry requirements. However, space limitations on the circuit surface hinders the achievement of full symmetries on both the power and gate layouts because they constrain one another. This paper proposes a solution for safely paralleling discrete SiC MOSFETs while decoupling the gate and power layout designs. It requires placing one BJT-based fast current amplifier as close as possible to each MOSFET rather than using just one to feed all the MOS gates. This reduces the noise in the received gating signals and, more importantly, reduces the sensitivity of driver-gate path geometric / electric mismatches. This makes it possible to safely relax the symmetry requirements for the gating circuitry, thereby providing designers with more freedom to achieve better symmetry in the power layout.es_ES
dc.description.sponsorshipThis work was supported in part by the Government of the Basque Country within the fund for research groups of the Basque University system IT978-16 and by the ELKARTEK research program (project ENSOL2-KK-2020/00077) and by the MCIN/AEI/10.13039/501100011033 within the project PID2020-115126RB-I00.es_ES
dc.language.isoenges_ES
dc.publisherWileyes_ES
dc.relationinfo:eu-repo/grantAgreement/MCIN/PID2020-115126RB-I00es_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.titleMultiple current amplifier-based gate driving for parallel operation of discrete SiC MOSFETses_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.rights.holderThis is an open access article under the terms of the Creative Commons Attribution-NonCommercial-NoDerivsLicense, which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made. © 2022 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technologyes_ES
dc.relation.publisherversionhttps://ietresearch.onlinelibrary.wiley.com/doi/full/10.1049/pel2.12232es_ES
dc.identifier.doi10.1049/pel2.12232
dc.departamentoesTecnología electrónicaes_ES
dc.departamentoeuTeknologia elektronikoaes_ES


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