| dc.contributor.author | Saldaña Mulero, Gaizka | |
| dc.contributor.author | Etxegarai Madina, Agurtzane | |
| dc.contributor.author | Larruscain Escobal, Dunixe Marene  | |
| dc.contributor.author | Iturregi Aio, Araitz | |
| dc.contributor.author | Apiñaniz, Susana | |
| dc.date.accessioned | 2024-02-08T11:46:52Z | |
| dc.date.available | 2024-02-08T11:46:52Z | |
| dc.date.issued | 2018-06-11 | |
| dc.identifier.citation | 19th IEEE Mediterranean Electrotechnical Conference (MELECON) : 25-29 (2018) | |
| dc.identifier.isbn | 9781538637388 | |
| dc.identifier.issn | 9781538637388 | |
| dc.identifier.issn | 2158-8481 | |
| dc.identifier.uri | http://hdl.handle.net/10810/65735 | |
| dc.description.abstract | The relevance of multi-terminal HVDC grids is
expected to increase in next years. However, there are still several
technical, economical and legal limitations that interfere with the
construction of those multi-terminal links. One of the main
technical obstacles is the handling of DC fault currents, because
the interruption of DC currents in HVDC systems is nowadays a
challenge. Among other proposals, the application of
Superconducting Fault Current Limiters (SFCLs) combined with
a mechanical Circuit Breaker (CB) solves technically that issue,
according | es_ES |
| dc.description.sponsorship | The authors thank the support from the Spanish Ministry
of Economy, Industry and Competitiveness (project
ENE2016-79145-R AEI/FEDER, UE), the Basque
Government (project ELKARTEK KK-2017/00083), as well
as from the University of the Basque Country UPV/EHU
(project EHUA15/25) | |
| dc.language.iso | eng | es_ES |
| dc.publisher | IEEE | es_ES |
| dc.relation | info:eu-repo/grantAgreement/MINECO/ENE2016-79145-R | |
| dc.rights | info:eu-repo/semantics/openAccess | es_ES |
| dc.subject | DC fault | es_ES |
| dc.subject | HVDC | |
| dc.subject | multi-terminal | |
| dc.subject | VSC-HVDC | |
| dc.subject | PSCAD/EMTDC | |
| dc.subject | resistive fault current limiter | |
| dc.title | Impact of a resistive superconductive fault current limiter in a multi-terminal HVDC grid | es_ES |
| dc.type | info:eu-repo/semantics/conferenceObject | es_ES |
| dc.rights.holder | © 2018 IEEE | * |
| dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8379062 | |
| dc.identifier.doi | /10.1109/MELCON.2018.8379062 | |
| dc.departamentoes | Ingeniería eléctrica | es_ES |
| dc.departamentoeu | Ingeniaritza elektrikoa | es_ES |
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