Analysis of impedance and current distributions in parallel IGBT design

Abstract

Power electronic applications need high voltage and current ranges which are impossible to obtain with discrete devices. Parallelization technique is a solution to increase power converter current capacity. Current distribution problems may reduce device lifetime and cause converter malfunction. Parallelization requires a total control of circuit parasitic elements which depend on layout physical materials and dimensions. The objective of this article is to show, by electromagnetic (EM) model simulations, layout non ideal effects for power circuits, in order to understand and control circuit stray elements, especially parasitic inductances, and current distributions.