dc.contributor.author | Villalta Bustillo, Igor | |
dc.contributor.author | Bidarte Peraita, Unai | |
dc.contributor.author | Santos, Gorka | |
dc.contributor.author | Matallana Fernandez, Asier | |
dc.contributor.author | Jiménez Verde, Jaime | |
dc.date.accessioned | 2024-06-03T13:52:16Z | |
dc.date.available | 2024-06-03T13:52:16Z | |
dc.date.issued | 2014-11-26 | |
dc.identifier.citation | Design of Circuits and Integrated Systems, Madrid, Spain, 2014 : 1-6 (2014) | es_ES |
dc.identifier.isbn | 978-1-4799-5743-9 | |
dc.identifier.uri | http://hdl.handle.net/10810/68319 | |
dc.description | Articulo Congreso DCIS 2014 | es_ES |
dc.description.abstract | This paper presents a fault injection method for SEU (Single Event Upset) emulation in FPGAs based on loading at the programmable logic a configuration file with an erroneous bit. A "Xilinx Zynq®-7000 All Programmable SoC" device has been used to implement it, which combines a hard microprocessor (Processing System PS) with Programmable Logic (PL). The emulation tool is fully implemented on the Zynq chip, which means that neither additional external equipment nor PCB modifications are needed. Communications to external devices that slow down the configuration process are avoided, so a high fault-injection rate is achieved. Previous works consider including fault injection circuitry at the PL. This circuitry can be affected by a faulty configuration file, leading the device to an unrecoverable state, which is named as "injection side effects". In the method proposed in this paper the injection is implemented in the processing system of the Zynq device, making the injection system independent to the programmable logic and avoiding the previously mentioned effect. This method allows using complete bitstreams, partial bitstreams and one-frame bitstreams to inject faults. A comparison is done so as to find the most appropriate bitstream type. | es_ES |
dc.description.sponsorship | This work was carried out in the R&D Unit UFI11/16 of the UPV/EHU, and supported by the Ministerio de Ciencia e Innovacion of Spain within the projects TEC2011–28250-C02-01/2, by the UPV/EHU within the project US13/13 and by the Basque Governments Department of Education, Universities and Research within the research fund of the Basque university system IT394–10. | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | IEEE | es_ES |
dc.relation | info:eu-repo/grantAgreement/MCIN/TEC2011–28250-C02-01/2 | es_ES |
dc.rights | info:eu-repo/semantics/openAccess | es_ES |
dc.subject | SEU | es_ES |
dc.subject | FPGA | es_ES |
dc.subject | emulation | es_ES |
dc.subject | fault injection | es_ES |
dc.subject | fault tolerance | es_ES |
dc.subject | ZYNQ | es_ES |
dc.title | Fault Injection System for SEU Emulation in Zynq SoCs | es_ES |
dc.type | info:eu-repo/semantics/conferenceObject | es_ES |
dc.rights.holder | © 2014 IEEE | es_ES |
dc.relation.publisherversion | https://ieeexplore-ieee-org.ehu.idm.oclc.org/document/7035579 | es_ES |
dc.identifier.doi | 10.1109/DCIS.2014.7035579 | |
dc.departamentoes | Tecnología electrónica | es_ES |
dc.departamentoeu | Teknologia elektronikoa | es_ES |