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Control of automotive dual three-phase interior permanent magnet synchronous machine drive with cascaded DC-link capacitors
(IEEE, 2021-11-16)
In this work, a dual three-phase Interior Permanent Magnet Synchronous Machine (IPMSM) drive connected to a high voltage DC/DC converter (800 V) at its input is considered for electric vehicle (EV) applications. The drive ...
Design and Evaluation of a RISC-V based SoC for Satellite on-board Networking
(Malaga University, 2023-11-17)
SpaceWire is a communication protocol that has become widely used in spacecraft for connecting instruments to data processors, mass-memory, and control processors. Field-Programmable Gate Arrays (FPGAs) have been a popular ...
Duplicate and Circulating Frames Discard Methods for PRP and HSR (IEC62439-3)
(IEEE, 2013-11)
Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR), defined in the IEC62439-3 about high availability automation networks and proposed as reference network topologies for substation communication ...
High Availability Automation Networks: PRP and HSR Ring Implementations
(IEEE, 2012-05)
The work developed has as basis the networks/protocols described in the standard IEC 62439-3 Industrial automation networks - High availability automation networks: PRP and HSR. The similarities of both networks and a ...
Memory Requirements Analysis for PRP and HSR Hardware Implementations on FPGAs
(IEEE, 2014-01-02)
The IEC62439-3 defines two ways to obtain a high availability automation network: Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR). In order to do that, those methods include different ...
PRP and HSR Version 1 (IEC 62439-3 Ed.2), Improvements and a Prototype Implementation
(IEEE, 2013-11)
The IEC62439-3: Industrial communication networks - High availability automation networks - Part 3: Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR), defines two protocols which provides ...
Functional Verification for SEU Emulation in FPGA Designs
(2014-09-17)
In this paper techniques to detect failures in a FPGA are presented and their application to SEU
(Single Event Upset) emulation applications is discussed. SEU emulation in FPGAs consists on
programming the device with a ...
Fault Injection System for SEU Emulation in Zynq SoCs
(IEEE, 2014-11-26)
This paper presents a fault injection method for SEU (Single Event Upset) emulation in FPGAs based on loading at the programmable logic a configuration file with an erroneous bit. A "Xilinx Zynq®-7000 All Programmable SoC" ...
Estado del arte de la tecnología planar y trench de IGBTs de silicio
(SAAEI, 2015-07-10)
La aparición del IGBT supuso el desarrollo del semiconductor de potencia para las aplicaciones de
potencia que requieren elevados valores de tensión y corriente junto a elevadas frecuencias de
conmutación. Durante los ...
Influencia de las modulaciones PWM en las pérdidas de potencia de los condensadores del DC-Link en inversores VSI multifásicos
(2022)
En aplicaciones de tracción eléctrica, los accionamientos multifásicos se están convirtiendo en una alternativa a tener en cuenta frente a sus homólogos trifásicos, debido a una serie de ventajas que compensan su coste ...